Keynote Speakers

Harry Foster

Chief Scientist Verification  
Mentor, A Siemens Business

 

Harry Foster is Chief Scientist Verification for the Design Verification Technology Division of Mentor, A Siemens Business; and is the Co-Founder and Executive Editor for the Verification Academy.

 

He holds multiple patents in verification and has co-authored six books on verification.

 

Harry was the 2006 recipient of the Accellera Technical Excellence Award for his contributions to developing industry standards, and was the original creator of the Accellera Open Verification Library (OVL) standard.

 

Harry currently serves as the Vice Chair for the 2020 Design Automation Conference.

Fergus Casey

Director of R&D for Processor IP  
Synopsys

 

Fergus Casey is Director of R&D for Processor IP at Synopsys with responsibility across a broad product portfolio including ARC RISC/DSP Processors, Embedded Vision and AI engines, Safety & Security ready cores.
 

His team has been first to market with a growing portfolio of ISO 26262 ready embedded processors from the ARCv2 EMSI (ASIL-D) Safety Island to the Embedded Vision (AI ready) EV6x Processor (ASIL-B & D), which recently received 2019 Vision Product of the Year from the Embedded Vision Alliance.
 

He was instrumental in defining state-of-the art SoC safety architectures broadly supported across Synopsys Automotive IP portfolio.
 

Leveraging this experience, he engages with automotive customers globally from architecture definition through to safety ready silicon execution.
 

Fergus holds a bachelor’s degree in electrical engineering from University College Cork, Ireland

Nitin Kishore

Founder & CEO  
Truechip

 

Nitin Kishore- Founder & CEO, Truechip- Over 18+ years of engineering and management experience developing and bringing to market over 30 products. Prior to founding Truechip, Nitin was most recently a Design Manager at Freescale Semiconductor.

 

Nitin worked at FSL for 10 years. Prior to that Nitin worked at ControlNet, Goa. Hands on experience in frontend and backend SoC design flows.

 

Nitin holds a PGDM (Finance) from AIMA, and a BE (Electronics & Telecomm) from Pune University, India.