Jean Marie Brunet
VP and GM , HW Assisted Verification
09:30 - 09:50
Digitalization Verification and Validation – Challenges and Direction
The relentless pace of innovation, rapidly changing markets, and increasing product complexity are creating intense pressures on companies in the semiconductor and hardware space. Some of the biggest challenges relate to scaling effectively and efficiently within the context of digitalization.
This keynote defines four key areas that illustrate the challenges and direction for digitalization.
Semiconductor market evolution and trends
Three pillars for enabling digitalization
Verification and validation essentials
Jean-Marie Brunet is the Vice President and General Manager of HW Assisted Verification at Siemens EDA
He has served for over 25 years in management roles in marketing, application engineering, product management and product engineering roles in the EDA industry, and has held IC design and design management positions at STMicroelectronics, Cadence, and Micron among others. Jean-Marie holds a master’s degree in electrical engineering from I.S.E.N Electronic Engineering School in Lille, France. Jean-Marie Brunet can be reached at email@example.com
09:50 - 10:10
Driving the Photonic IC (R)evolution
Director of Product Management & Marketing
In this presentation, Yuval will give an overview of the silicon photonic market, some of the trends in the semiconductor design industry, and will try to answer the questions of “What is silicon photonic?” and “Is Photonic IC an inevitable technology?”
The presentation will also cover the photonic IC design solution and how Synopsys is helping the industry to accelerate innovation.
Yuval Shay is a Director of product management and marketing at Synopsys, responsible for the Photonic Solution at the Custom Design and Manufacturing group.
Prior to joining Synopsys, Yuval held product management positions at Cadence Design Systems, responsible for Custom and Analog Mixed-Signal design products and solutions, prior to that, Yuval spent over 15 years at STMicroelectronics in various engineering roles.
Product Engineering Group Director, System and Verification Group
10:10 - 10:30
The Impact of AI in Intelligent System Design
Electronics design is undergoing a revolution as semiconductors are used in more and more market applications. Each has its unique data and workload and requires customized compute and analytics architectures. Advanced semiconductors are implemented in the latest process nodes, in the most complex 3D-ICs, to achieve top performance with more operational flexibility. When the scope is expanded to the full system, complexity further exceeds the traditional siloed engineering teams and methodology. AI is showing promise for addressing the growing complexity, finding optimal design outcomes, and substantially improving overall team productivity. But not all problems are equal. Which are the intelligent system design challenges that AI is best suited for? What impact should be expected from applying AI to these challenges? And what is the frontier of AI solutions for intelligent system design?
Matt Graham is a Product Engineering Group Director in the System and Verification Group at Cadence, and the product manager for the Verisium AI-Driven Verification Platform. Matt has held various roles in applications and product engineering over his nearly 20 year career at Cadence. As a verification engineer at Nortel and then AMCC early in his career, Matt was an early adopter of advanced verification technologies and methodologies. As an applications and product engineer at Cadence, Matt has deployed and defined advanced verification flows with Cadence customers worldwide, in industries from automotive to consumer to hyperscale.