Agenda
December 13, 2021
MDI Expo 2021 is packed with professional content; great keynote speakers, and 4 professional tracks:
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IP & Cores
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Front-end Design & Verification
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Physical Design
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Post Silicon
Professional tracks presentations will start after a general assembly session.
Event agenda - General
08:00 - 09:20
Breakfast, Exhibit Viewing
09:20 - 10:40
General Assembly - Keynote Speakers
10:40 - 11:20
Break, Exhibition Visit
11:20 - 13:00
Professional Tracks - Part 1 (IP & Cores, Front-end Design & Verification, Physical Design)
13:00 - 14:00
Lunch, Exhibit Viewing
14:00 - 15:40
Professional Tracks - Part 2 (IP & Cores, Post Silicon)
15:40
Summary, Lucky Draws
Keynote Speakers (General Assembly)
(click here for detailed track agenda - soon)
09:20 - 09:40
Welcome Notes
Shuka Zernovizky
Founder, SemIsrael
09:40 - 10:00
Digitalization - Fueling the Semiconductor Market Resurgence
Joseph Sawicki
Executive Vice President, Siemens EDA
10:00 - 10:20
A New Infrastructure for a New Era
Eddie Ramirez
VP of Marketing, Infrastructure Business Unit, Arm
10:20 - 10:40
New Semiconductor Ecosystem – Innovations Welcome!
Steve McDonald
Regional Vice President, Europe, Synopsys
IP & Cores Track
(click here for detailed track agenda - soon)
11:20 - 11:40
ATPG Boost: Improve Test Quality in Less Time
Itamar Tsachi
Technical Account Manager, IC Verification & Validation, Siemens EDA
11:40 - 12:00
A Trusted Partner to Watch Your Back and Pave Your Path to Success
Mauro Diamant
SiFive and OpenFive Sales Representative in Israel
12:00 - 12:20
TBD by Flex Logix
12:20 - 12:40
RISC-V Going to Vectors and Out-of-order
Vadim Malenboim
Field Application Engineer, SiFive
12:40 - 13:00
Selecting the Right High Bandwidth Memory
Frank Ferro
Sr Dir Product Marketing, Rambus
13:00 - 14:00
Lunch, Exhibit Viewing
14:00 - 14:20
Ultra-low Read Energy (0.4V/1uA) OTP for IoT Applications
Wim van Seters
Sales Director Europe & Israel, Attopsemi Technology
14:20 - 14:40
Trends and Challenges in Building Automotive SoCs
Arm
14:40 - 15:00
Design Beyond Standards, IPaaS (IP-as-a-Service)
Gary Golembo
Director of Business Development, HCL Technologies, Engineering R&D Services (ERS)
15:00 - 15:20
A Leap Forward in Memory Technology for a New Era of Intelligent Devices
Amir Regev
VP Technology Development, Weebit Nano
Front-end Design & Verification Track
(click here for detailed track agenda - soon)
11:20 - 11:40
Functional Static Sign-Off’s Expanding Role
Vishnu Vimjam, Ph.D.
Chief Architect, Real Intent
11:40 - 12:00
Enhance Verification Using Scalable FPGA Prototyping Solution
David Kaushinsky
Senior Application Engineer, Siemens EDA
12:00 - 12:20
Why Wait For Simulation? Catch Functional Bugs Much Earlier!
Yaron Ilani
Director, Applications Engineering, Synopsys
12:20 - 12:40
TBD
12:40 - 13:00
TBD
13:00 - 14:00
Lunch, Exhibit Viewing
Physical Design Track
(click here for detailed track agenda - soon)
11:20 - 11:40
Innovative Test Solutions For Advanced Silicon Nodes
Tal Kogan
European DFT Manager, Synopsys
11:40 - 12:00
TBD
12:00 - 12:20
An Efficient Design Flow For IC Power Module Design
Nikola Kontic
Solution Architect, Zuken
12:20 - 12:40
Innovative Chips and Cooler Designs with Aprisa
Nahum Rozen
Aprisa P&R Application Engineering Specialist, Siemens EDA
12:40 - 13:00
TBD
13:00 - 14:00
Lunch, Exhibit Viewing
Post Silicon Track
(click here for detailed track agenda - soon)
14:00 - 14:20
TBD by ATS Engineering
14:20 - 14:40
TBD
14:40 - 15:00
Heterogeneous IC Packaging for Advanced AI Applications
Fernando Roa
Sr Director, fcCSP/fpfcCSP/PoP, Amkor Technology
15:00 - 15:20
Advanced Packaging Technologies to Enable New Applications
Fernando Roa
Sr Director, fcCSP/fpfcCSP/PoP, Amkor Technology